EDN

FPGA-Based FIR Filters using Distributed Arithmetic

M. Martinez-Peir, R. Colom, F. Ballester, and R. Gadea are teachers with a focus on digital applications at the Technical University of Valencia, Spain. They are currently working on video compression ...
EDN

FIR Filters and FFTs with 28-nm Variable-Precision DSP Architecture

Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are finite impulse response (FIR) filters and fast Fourier transforms (FFTs).
TechRepublic

FPGA Implementation of a New Parallel FIR Filter Structures

In recent days filters with large lengths are started to use. So parallel processing is essential at any cost. In this paper, the authors propose new parallel FIR filter structures, which are ...
Design-Reuse

Systolic FIR Filter Based FPGA

In this paper, we first review in detail the basic building blocks of reconfigurable devices, essentially, the field-programmable gate arrays, then we describes a high-speed, reconfigurable Systolic ...
Electronic Design

Digital Filter Design

Digital signal processors (DSPs) continue to receive a great deal of attention in new product design. For example, digital filter design reflects the importance of understanding and using this ...
Design-Reuse

Optimizing Up/Down Conversion with FPGA Techniques

Digital upconverters (DUCs) and digital downconverters (DDCs) are important components of every modern wireless base station design. While many DUC and DDC designs are available, there is a clear call ...
Nature

Variable Fractional Delay Filter Design and Signal Processing

Variable fractional delay (VFD) filter design has become increasingly significant in digital signal processing, offering the flexibility to delay signals by non-integer amounts. This technology is ...