Electronic Design

Embracing Multicore and RISC-V Architectures in SoC Design

There’s been a significant shift toward RISC-V architectures in SoC design. This article highlights its impact on the semiconductor industry and role in fostering innovation and flexibility in ...
EDN

More Bad Advice for SOC Designers from the Reuse Methodology Manual: Point-to-Point Isn’t Really Pointless

In my previous blog entry, I continued my discussion of the “Reuse Methodology Manual for System-On-A-Chip Designs” (the RMM) by Michael Keating and Pierre Bricaud. This ground-breaking book on ASIC ...
Semiconductor Engineering

When Does My SoC Design Need A NoC?

Excluding the simplest offerings, almost every modern system-on-chip (SoC) device will implement its on-chip communications utilizing a network-on-chip (NoC). Some people question whether it is ...
Electronic Design

Leverage High-Frequency Source-Synchronous Memory in SoC Design

Download this article in PDF format. Today’s embedded systems require high external memory bandwidth to achieve fast boot time and application loading time with minimal cost. Historically, ...
EDN

Speeding AI SoC development with NoC-enabled tiling

Employing network-on-chip (NoC) technology in system-on-chip (SoC) designs has been proven to reduce routing congestion and lower power consumption. Now, a new NoC-enabled tiling methodology helps ...
Semiconductor Engineering

Avoiding Traffic Jams In SoC Design

While sitting in a traffic jam on the way to work, I realized that the sheer volume of vehicles on the road exceeds the capacity originally planned for by civil engineers, when highways first hit the ...